Customize Clocks
Purpose
Customize CPU, GPU, and EMC clock behavior on a Jetson target by editing files under
Linux_for_Tegra/
before flashing the image. Two layers are in scope:
The
BPMP DTB
at
Linux_for_Tegra/bootloader/
— per-clock
max-rate-custom
ceilings, plus the EMC DVFS gate (bwmgr + cactmon on all SoCs; osp-controller on T26x only).
nvpower.sh
at
Linux_for_Tegra/rootfs/etc/systemd/nvpower.sh
— cpufreq / devfreq governors and (optionally) per-device min / max / static rates written to sysfs at boot.
Common triggers: "lock CPU/GPU/EMC frequency", "pin GPU to Fmax", "pin EMC to MAXN", "disable/enable EMC DVFS", "disable/enable CPU DVFS", "set CPU/GPU max rate", "change cpufreq governor".
Out of scope: runtime clock tuning on a live target (no flash step), nvpmodel power-mode edits (use the sibling skill
/jetson-customize-nvpmodel
), and silicon-ceiling overrides (
max-rate-maxn
is read-only).
Prerequisites
Resolve the active profile per
../../context/target-platform-contract.md
.
Refuse and route in these cases:
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Installs
696
Repository
nvidia/skills
GitHub Stars
2.4K
First Seen
Jun 22, 2026
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